FPGA in HFT- how does the job prospect looks like for hardware/chip designers?

I worked as design engineer for technology (non-financial) company that specialises in designing network interface cards (PCBs) and on top of that IP's for HFT and telecoms. Afterwards, I moved to telecom where we design ASICs which is opposite direction to yours. HFT: - much faster development cycle (weeks - month(s) vs years), - much better feedback (quicker, you often work with software reference models, directly with clients which will call you next hour after delivery), - less verification required (you can fix it later often with just scope), - there are many more aspects that you learn on the way about computer architecture (device drivers, PCIe/QPI, cache optimisation, multithreading & OS internals) - quality knowledge like docs and books is available online (non NDA involved). Solid communities (more people to communicate with ie stackoverflow) vs (onsite, few days long, expensive trainings) - this depends but in general you tend to have smaller teams (hw + sw  the same person) mostly because projects are much narrower - compensation ASIC: - much more complex designs, much broader knowledge, you must learn to abstract properly complexity, - doing things the right way in every domain (there are no shortcuts,  often building tools to make it that way) - I guess you know more about silicon and where industry is heading. I guess HFT is fast paced running whereas ASIC is more about craftsmanship and diving. I assume that you could find that in HFT when architecting framework rather than single component?