What is really the difference between FPGA and ASIC?

What do you think of automated FPGA-to-ASIC conversion as a product?

• From engineering side and in terms of cost-effectiveness. I found one startup which promises  automated FPGA-to-ASIC conversion with "zero NRE", called Kaisemi It looks like the other startup in this space called Tier Logic folded due to lack of funding: http://www.eetimes.com/electronics-news/4204843/FPGA-startup-Tier-Logic-folds

• Answer:

  This is not gonna fly, since system-level design and RTL design for FPGA or standard-cell and semi-custom design are the same. The difference is in the way you carry out logic synthesis and physical design. So, if you want to convert an FPGA implementation to a standard-cell and semi-custom design, you use start from using the appropriate logic synthesis tool for standard-cell and semi-custom design. Converting a logic-level or physical-level netlist for FPGAs to that of standard-cell and semi-custom design would make it hard for the design team to arrive at design closure. This is because you will be stuck at local optimums (due to the limitations of the FPGA CAD tools) that can be overcome with EDA tools for standard-cell and semi-custom design and a good VLSI design flow to get closer to the globally optimal trade-off between the design objectives.