How to artificially cause a page fault in linux kernel?

What is the order (in terms of time consumption) of: context switch, minor/major page fault, read from main memory and register access?

• A minor page fault is definitely cheaper than a major page fault because it just needs to update the page table and needs not read from disk (a major page fault does).   A read from main memory should be faster than any of the page fault situations but what seems confusing is whether, for example, a minor page fault includes updating the page table and then reading from main memory (as opposed to just updating the table, which might take shorter than just reading from main memory).   I suppose the register access should be the fastest of all.   The context switch involves reading and writing PSB state information to/from kernel memory (so it is already at least as slow as reading from main memory) + reloading the cache and scheduling. It does not involve reading/writing to/from secondary memory (disk).   If my assumptions are correct the order should be: register access (fastest) > read from main memory > minor page fault > context switch > major page fault   What are you thoughts on this?

• Answer:

  The expense of a page fault is dependent on its type. Simple access to memory for which there is no backing store may be more complex than you are envisioning. This could require the system to swap some other page to disk, write zeros to the now available page, and update the page table of the requesting process. Conversely, a context switch MIGHT be less involved in a system where there is an abundance of RAM and many processes are sharing the same pages. If the distinguishing characteristics between the activating process and the prior process are few, i.e., the contexts are very similar, the switch can happen with little cost. (I have seen threading mechanisms which rely on this.) Or a context switch can cause an incredible number of page faults, both "minor" and "major" by your definitions. Generally, I would place a context switch as the highest cost item. In decreasing expense order the list would then go "major" fault, "minor" fault, memory (main RAM) access, processor cache access, and finally register access, recognizing there are exceptions for everything. Register and processor pipeline cache access are far and away the least expensive, perhaps by magnitudes of order.